Germanium is a commonly known semiconductor material. The electron mobility and hole mobility of germanium are greater than that of silicon, hence making germanium an excellent material in the formation of integrated circuits. However, in the past, silicon gained more popularity since its oxide (silicon oxide) is readily usable in the gate dielectric of metal-oxide-semiconductor (MOS) transistors. The gate dielectrics of the MOS transistors can be conveniently formed by thermal oxidation of silicon substrates. The oxide of germanium, on the other hand, is soluble in water, and hence is not suitable for the formation of gate dielectrics. Particularly, germanium oxides can easily evaporate at temperatures higher than about 430° C., and germanium may easily diffuse to neighboring silicon layers. This poses problems since the manufacturing processes of the MOS transistors often involve annealing temperatures of about 600° C. or above.
With the use of high-k dielectric materials in the gate dielectrics of MOS transistors, the convenience provided by silicon oxide is no longer a dominating advantage, and hence germanium is reexamined for use in integrated circuits. However, a further challenge faced by the semiconductor industry is that it is difficult to integrate PMOS devices formed on germanium layers or substrates with NMOS devices that are formed on high-electron-mobility materials. Research has been conducted to solve this problem. For example, in one of the proposed solutions, a germanium layer or a compound semiconductor layer formed of group III and group V elements (also known as III-V materials) may be formed on a silicon substrate. A III-V region may further be formed on top of the germanium layer or the compound semiconductor layer for an NMOS device, while a germanium region may be formed on top of the germanium layer or the compound semiconductor layer for a PMOS device. In another proposed solution, a germanium layer is formed on a silicon substrate. A silicon region is then formed on the germanium layer for an NMOS device, and a germanium region is formed on the germanium layer for a PMOS device. However, these solutions face problems such as lattice mismatch between substrates and the materials grown thereon, and increased manufacturing cost due to increased process steps. What is needed, therefore, is a method for overcoming the above-described shortcomings in the prior art.